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  IRF7807VD1 11/12/03 IRF7807VD1 r ds (on) 17m ? q g 9.5nc q sw 3.4nc q oss 12nc  device characteristics  so-8 fetky  mosfet / schottky diode top view 8 1 2 3 4 5 6 7 a/s a/s a/s g k/d k/d d k/d k/d ? co-pack n-channel hexfet ? power mosfet and schottky diode  ideal for synchronous rectifiers in dc-dc converters up to 5a output  low conduction losses  low switching losses  low vf schottky rectifier  100% r g tested description the fetky ? family of co-pack hexfet ? mosfets and schottky diodes offers the designer an innovative, board space saving solution for switching regulator and power management applications. hexfet power mosfets utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. combining this technology with international rectifier?s low forward drop schottky rectifiers results in an extremely efficient device suitable for use in a wide variety of portable electronics applications. the so-8 has been modified through a customized leadframe for enhanced thermal characteristics. the so- 8 package is designed for vapor phase, infrared or wave soldering techniques. www.irf.com 1 pd-94078a absolute maximum ratings parameter symbol units drain-to-source voltage v ds v gate-to-source voltage v gs continuous output current 25c a (v gs 4.5v) 70c pulsed drain current  i dm 25c 70c schottky and body diode 25c average forward current  70c junction & storage temperature range t j , t stg c thermal resistance parameter symbol typ max units maximum junction-to-ambient  r ja ??? 50 maximum junction-to-lead  r jl ??? 20 power dissipation  1.6 max 8.3 66 30 20 6.6 c/w 2.5 -55 to 150 i d p d i f (av) 3.5 2.2 w
IRF7807VD1 2 www.irf.com notes:  repetitive rating; pulse width limited by max. junction temperature.  pulse width 400 s; duty cycle 2%.  when mounted on 1 inch square copper board  50% duty cycle, rectangular  typical values of r ds (on) measured at v gs = 4.5v, q g , q sw and q oss measured at v gs = 5.0v, i f = 7.0a.     
      * device are 100% tested to these parameters. electrical characteristics parameter symbol min typ max units drain-source breakdown voltage bv dss 30 ??? ??? v static drain-source on-resistance r ds(on) ??? 17 25 m ? gate threshold voltage v gs(th) 1.0 ??? 3.0 v ??? ??? 100 a ??? ??? 20 a ??? ??? 2.0 ma gate-source leakage current i gss ??? ??? 100 na total gate charge* q g ??? 9.5 14 pre-vth gate-source charge q gs1 ??? 2.3 ??? post-vth gate-source charge q gs2 ??? 1.0 ??? gate-to-drain charge q gd ??? 2.4 ??? switch charge (q gs2 + q gd )q sw ??? 3.4 5.2 output charge* q oss ??? 12 16.8 v ds = 16v, v gs = 0 gate resistance r g 0.9 ??? 2.8 ? turn-on delay time t d(on) ??? 6.3 ??? rise time t r ??? 1.2 ??? turn-off delay time t d(off) ??? 11 ??? fall time t f ??? 2.2 ??? diode characteristics parameter symbol min typ max units diode forward voltage v sd ??? ??? 0.5 ??? ??? 0.39 di/dt = 700a/s v dd = 16v, v gs = 0v, i d = 15a t j = 25c, i s = 1.0a ,v gs = 0v  conditions v gs = 0v, i d = 250a v gs = 4.5v, i d = 7.0a  v ds = v gs , i d = 250a v ds = 30v, v gs = 0v v gs = 20v ??? conditions v nc ns v ds = 24v, v gs = 0v v ds = 24v, v gs = 0v, t j = 100c drain-source leakage current i dss v ds = 4.5v i d = 7.0a v ds = 16v t = 125c, i s = 1.0a, v gs = ov  resistive load v dd = 16v, i d = 7.0v v gs = 5v, r g = 2 ? nc ns reverse recovery charge  t j = 25c, i s = 7.0a ,v ds = 16v di/dt = 100a/s ??? t rr reverse recovery time  ??? 51 q rr ??? 51
IRF7807VD1 www.irf.com 3 control fet special attention has been given to the power losses in the switching elements of the circuit - q1 and q2. power losses in the high side switch q1, also called the control fet, are impacted by the r ds(on) of the mosfet, but these conduction losses are only about one half of the total losses. power losses in the control switch q1 are given by; p loss = p conduction + p switching + p drive + p output this can be expanded and approximated by; p loss = i rms 2 r ds(on ) () + i q gd i g v in f ? ? ? ? ? ? + i q gs 2 i g v in f ? ? ? ? ? ? + q g v g f () + q oss 2 v in f ? ? ? ? this simplified loss equation includes the terms q gs2 and q oss which are new to power mosfet data sheets. q gs2 is a sub element of traditional gate-source charge that is included in all mosfet data sheets. the importance of splitting this gate-source charge into two sub elements, q gs1 and q gs2 , can be seen from fig 1. q gs2 indicates the charge that must be supplied by the gate driver between the time that the threshold voltage has been reached (t1) and the time the drain current rises to i dmax (t2) at which time the drain volt- age begins to change. minimizing q gs2 is a critical fac- tor in reducing switching losses in q1. q oss is the charge that must be supplied to the out- put capacitance of the mosfet during every switch- ing cycle. figure 2 shows how q oss is formed by the parallel combination of the voltage dependant (non- linear) capacitance?s c ds and c dg when multiplied by the power supply input buss voltage. figure 1: typical mosfet switching waveform synchronous fet the power loss equation for q2 is approximated by; p loss = p conduction + p drive + p output * p loss = i rms 2 r ds(on) () + q g v g f () + q oss 2 v in f ? ? ? ? ? + q rr v in f ( ) *dissipated primarily in q1. power mosfet selection for dc/dc converters 4 1 2 drain current gate voltage drain voltage t3 t2 t1 v gth q gs1 q gs2 q gd t0
IRF7807VD1 4 www.irf.com typical mobile pc application the performance of these new devices has been tested in circuit and correlates well with performance predic- tions generated by the system models. an advantage of this new technology platform is that the mosfets it produces are suitable for both control fet and synchro- nous fet applications. this has been demonstrated with the 3.3v and 5v converters. (fig 3 and fig 4). in these applications the same mosfet irf7807v was used for both the control fet (q1) and the synchronous fet (q2). this provides a highly effective cost/performance solution. figure 3 figure 4 figure 2: q oss characteristic for the synchronous mosfet q2, r ds(on) is an im- portant characteristic; however, once again the im- portance of gate charge must not be overlooked since it impacts three critical areas. under light load the mosfet must still be turned on and off by the con- trol ic so the gate drive losses become much more significant. secondly, the output charge q oss and re- verse recovery charge q rr both generate losses that are transfered to q1 and increase the dissipation in that device. thirdly, gate charge will impact the mosfets? susceptibility to cdv/dt turn on. the drain of q2 is connected to the switching node of the converter and therefore sees transitions be- tween ground and v in . as q1 turns on and off there is a rate of change of drain voltage dv/dt which is ca- pacitively coupled to the gate of q2 and can induce a voltage spike on the gate that is sufficient to turn the mosfet on, resulting in shoot-through current . the ratio of q gd /q gs1 must be minimized to reduce the potential for cdv/dt turn on. spice model for irf7807v can be downloaded in machine readable format at www.irf.com. 
    
    83 84 85 86 87 88 89 90 91 92 93 12345 load current (a) efficiency (%) vin=24v vin=14v vin=10v 86 87 88 89 90 91 92 93 94 95 12345 load current (a) efficiency (%) vin=24v vin=14v vin=10v
IRF7807VD1 www.irf.com 5 fig 5. normalized on-resistance vs. temperature fig 7. on-resistance vs. gate voltage -60 -40 -20 0 20 40 60 80 100 120 140 160 0.0 0.5 1.0 1.5 2.0 t , junction temperature ( c) r , drain-to-source on resistance (normalized) j ds(on) v = i = gs d 4.5v 7.0a 0 0.2 0.4 0.6 0.8 1 v sd , source-to-drain voltage (v) 0 10 20 30 40 50 60 70 i s , s o u r c e - t o - d r a i n c u r r e n t ( a ) 380s pulse width tj = 150c vgs top 4.5v 3.5v 3.0v 2.5v 2.0v bottom 0.0v 0.0v fig 8. typical reverse output characteristics fig 7. typical reverse output characteristics 2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 v gs, gate -to -source voltage (v) 0.010 0.015 0.020 0.025 0.030 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( ? ) i d = 7.0a 0 0.2 0.4 0.6 0.8 1 v sd , source-to-drain voltage (v) 0 10 20 30 40 50 60 i s , s o u r c e - t o - d r a i n c u r r e n t ( a ) 380s pulse width tj = 25c vgs top 4.5v 3.5v 3.0v 2.5v 2.0v bottom 0.0v 0.0v
IRF7807VD1 6 www.irf.com figure 9. maximum effective transient thermal impedance, junction-to-ambient 0.1 1 10 100 0.00001 0.0001 0.001 0.01 0.1 1 10 notes: 1. duty factor d = t / t 2. peak t = p x z + t 1 2 j dm thja a p t t dm 1 2 t , rectangular pulse duration (sec) thermal response (z ) 1 thja 0.01 0.02 0.05 0.10 0.20 d = 0.50 single pulse (thermal response) 0 2 4 6 8 10 12 0 1 2 3 4 5 q , total gate charge (nc) v , gate-to-source voltage (v) g gs i = d 7.0a v = 16v ds fig 10. typical gate charge vs. gate-to-source voltage
IRF7807VD1 www.irf.com 7 mosfet , body diode & schottky diode characteristics fig. 12 - typical values of reverse current vs. reverse voltage fig. 11 - typical forward voltage drop characteristics 0 5 10 15 20 25 30 reverse voltage - v r (v) 0.0001 0.001 0.01 0.1 1 10 100 r e v e r s e c u r r e n t - i r ( m a ) 125c 100c tj = 150c 75c 50c 25c 0.0 0.2 0.4 0.6 0.8 1.0 1.2 forward voltage drop - v f ( v ) 0.1 1 10 100 i n s t a n t a n e o u s f o r w a r d c u r r e n t - i f ( a ) tj = 125c tj = 25c
IRF7807VD1 8 www.irf.com so-8 package details k x 45 c 8x l 8x h 0.25 (.010) m a m a 0.10 (.004) b 8x 0.25 (.010) m c a s b s - c - 6x e - b - d e - a - 8 7 6 5 1 2 3 4 5 6 5 recommended footprint 0.72 (.028 ) 8x 1.78 (.070) 8x 6.46 ( .255 ) 1.27 ( .050 ) 3x dim inches millimeters min max min max a .0532 .0688 1.35 1.75 a1 .0040 .0098 0.10 0.25 b .014 .018 0.36 0.46 c .0075 .0098 0.19 0.25 d .189 .196 4.80 4.98 e .150 .157 3.81 3.99 e .050 basic 1.27 basic e1 .025 basic 0.635 basic h .2284 .2440 5.80 6.20 k .011 .019 0.28 0.48 l 0.16 .050 0.41 1.27 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m-1982. 2. controlling dimension : inch. 3. dimensions are shown in millimeters (inches). 4. outline conforms to jedec outline ms-012aa. dimension does not include mold protrusions mold protrusions not to exceed 0.25 (.006). dimensions is the length of lead for soldering to a substrate.. 5 6 a1 e1 so-8 part marking
IRF7807VD1 www.irf.com 9 330.00 (12.992) max. 14.40 ( .566 ) 12.40 ( .488 ) notes : 1. controlling dimension : millimeter. 2. outline conforms to eia-481 & eia-541. feed direction terminal number 1 12.3 ( .484 ) 11.7 ( .461 ) 8.1 ( .318 ) 7.9 ( .312 ) notes: 1. controlling dimension : millimeter. 2. all dimensions are shown in millimeters(inches). 3. outline conforms to eia-481 & eia-541. so-8 tape and reel this product has been designed and qualified for the commercial market. qualification standards can be found on ir?s web site. ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 tac fax: (310) 252-7903 visit us at www.irf.com for sales contact information . 10/03


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